Dear Björn-san,
Sorry, my late reply. Thank you so much for your answer. I could confirm my understanding and approach are correct. But it means it is not so easy to increase processing speed much more.
For this project, we will do blob analysis on CPU because we found processing time meets their specification. Thank you so much again.
Best Regards,
Ryo Saito
Hello,
I'd like to know the way to speed up blob 2D operator processing time. I know following 2 way.
1. increase the input parallelism of blob 2d operator
2. decrease the detect object number of blob 2d operator
Current situation is input parallelism is maximum and detect object number is customer requested minimum number. But blob operator seems be bottle neck of design.
If you know any way to speed up blob 2d operator, I'd like to know it.
Dear Carmen-san,
thank you very much for your swift answer. It means I should adjust only address, I think. I will try.
Hello,
I have simple question. I'd like to have 8XR Tap Sorting. It is 8X reverse mode. I will be able to realize it with DRAM operator.
But if you have solution which doesn't use DRAM, I'd like to know your idea.
Ryo Saito
Hello Björn-san,
thank you for your answer. I understood.
Ryo Saito
Hello Björn-san,
please let me ask you additional question about RLE. As you told me, there is PackBitsRLE operator. It might be good for some customers. I might could suggest it but images is 16 bit.
My question is following two;
1. Following sample is not PackBitsRLE, correct?
C:\Program Files\SiliconSoftware\VisualApplets_3.2\Examples\Processing\Advanced\RunLengthEncoder\RunLengthEncoder.va
2. It is possible to use 2 PackBitsRLE operator for 16bit image, I think.
But this is proto type operator, if customer hope to use current generation board and next generation board as well, it might be impossible, correct?
Ryo Saito
Dear Johannes-san,
thank you very much for your question.
Yes, I think I can progress some projects with Compression Beyond. It receive our attention. Actually, we have some ace2 projects with this feature. I'm sure CameraLink and CXP customer also interested this feature.
Ryo Saito
Hello Björn-san,
thank you very much for your answer. I got your points. As you said, sometimes, RLE is not effective.
>In case you have a white-paper on a simple lossless compression I will have a look into it and let you know if VA operators can be used to assemble such an approach.
Thank you very much for your kind suggestion. But currently I don't have specific projects. However, we got many leads about compression in the last ITE show in Japan. At that moment, many customer hoped lossless compression to start evaluation. So I asked.
Ryo Saito
Hello,
Recently days, many customers are interested in saving all acquired images. Traceability is famous application but some customers want to save image for deep learning training.
After saving image, there are two types way how to use images.
1. Human check images
2. PC inspect images
1st case, lossy image is no problem. 2nd case, most customer don't hope lossy image because some parameters like threshold are different. DL training case is also. Because raw images are passed to DL core directly. If lossy images are used for training, it will be reason of low accuracy. So customer hope lossless compression needed.
Do you have any solution?
Dear Carmen-san,
thank you very much for your swift answer.
Yes, another solution is more better because we might be faced resource problem. Currently, this possibility information is enough for me. I will discuss more deeply with customer. Thank you.
Dear Application team,
I'd like to ask you possibility of replacement Halcon operator fit_surface_first_order by VisualApplets operators.
https://www.mvtec.com/doc/halc…_surface_first_order.html
Our customer inspect cable by Halcon but CPU load is very high. Inspection algorithm is very good for FPGA processing. But at before inspection, they need to process this halcon operator because lighting angle. One side of image is little bit bright compare than the other side. Problem is only this processing.
Currently, I don't need example but I'd like to know your opinion about possibilities. Potential is not small.
Do you think is it possible to make same feature by VisualApplets?
If you have other any idea, it will help me.
Best Regards,
Ryo Saito
Dear Johannes-san,
your sample looks working well. Thank you very much.
Ryo Saito
Dear Carmen-san,
Dear Johannes-san,
thank you very much for your advice. I will try to implement your idea in this week.
After that, if I have question, please let me re-open this thread.
Ryo Saito
Dear All,
I'd like to know your opinion.
We want to make 512 times faster pulse on FPGA. Usually, ShaftEncoder module generate 4 times faster signal. If input encoder signal is 1kHz, I want to generate 512kHz signal. Do you have any idea of applet design?
Best Regards,
Ryo Saito
Dear Rudde-san,
Yes, I understood and thank you for your answer. I found the solution thanks to your information.
Dera Rudde-san,
thank you very much for your swift information. It looks really good.
Ryo Saito
Dear Rudde-san,
thank you for your advice. Yes, I think so but many customers don't have parameter library license, unfortunately. It is really nice feature but it is very good for development phase. Customer said it is kind of debugging tool. It is not must a feature to realize customer's requirements like blob. I mean if customer don't have parameter library, customer can realize their requirements. That's why, many customers won't buy this feature, unfortunately.
If standard VA package include this feature, we can sell VA more easily.
Ryo Saito
Dear Application team,
many our customers use line camera with V-board. VA standard example include 2D distortion correction.
C:\Program Files\SiliconSoftware\VisualApplets_3.2\Examples\Processing\Geometry\GeometricTransformation
I know it work if we set parameters for Y coefficients to zero, But sometimes customers have not enough DRAM. I think, we can replace FrameBufferRandomRead to LineMemoryRandomRd for 1D distortion correction.
If you have such example, could you share with us?
Ryo Saito
Dear Johannes-san,
thank you very much for your swift answer. OK, I found TriggerQueue feature in this forum. I try to be rebuilt some features by myself.
But if SiSo prepare such examples in the future, it is very helpful for Japanese VisualApplets engineers !
Ryo Saito
Hi Silicon Software Application team,
Japanese customer ask us they want to have design of standard applets. We can check standard acquisition features below;
C:\Program Files\SiliconSoftware\VisualApplets_3.2\Examples\Acquisition
But standard applets like Acq_SingleFullLineGray.dll include more features like gamma correction, triggering, trigger queue and so on. Japanese VA users hope to add own image processing to base acquisition design.
Could you provide base design of standard applets?
