Recent Activities

  • Hi Theo,
    unfortunatly it's not that easy to solve this problem. The Processing Module in our Standard Applets actually is simply a lookup table. The values for these lookup-table are calculated in software and than written to the FPGA.

    So, what you…
  • Hi there,

    currently I am working with a customer who basically already solved some applications using microEnable IV AD4. Now he wants to switch to Marathon VCL with aditional functionallity, which is why we are planning to implement a VA for him.
    Of…
  • Johannes Trein

    Replied to the thread FPGA Image Rotation.
    Post
    Hi Mike,

    today I could test the apple in frame grabber hardware on FPGA. The "rotate90_simple.va" runs sufficiently fast enough for your application.
    See the following screenshot.
    We get 1024x1224*47fps = 58MPixel/s which is already the theoretic…
  • Johannes Trein

    Post
    internal remark: FR 8617
  • Mike Faulkner

    Like (Post)
    Hi Mike

    if your camera runs at 2448 x 2048 * 20fps with 12 Bit packed format the bandwidth will be 150MByte/s which is more than the theoretical maximum of Gigabit Ethernet vision.
    Anyway I made two designs which fulfill your requirements.

    You can…
  • Jesse Lin

    Post
    Hi Johannes

    I will send email to support@silicon-software.de.


    Thank you.

    Jesse
  • Johannes Trein

    Like (Post)
    Hi Johannes,

    Thank you for your explanation on the bandwidth and difficulties as well as the VA examples.

    This will become a solid base to start building the solution.

    Best regards,
    Mike
  • Mike Faulkner

    Replied to the thread FPGA Image Rotation.
    Post
    Hi Johannes,

    Thank you for your explanation on the bandwidth and difficulties as well as the VA examples.

    This will become a solid base to start building the solution.

    Best regards,
    Mike
  • JSuriya

    Post
    Hi Johannes,

    Thanks for the great help, i'll try implementing loop operation to accommodate my applet requirements.

    Regards,
    Jayasuriya
  • Hi Jayasuriya

    (Quote from JSuriya)

    It will work correct in hardware. In the simulation the 1D protocoll is considered as 2D images. Therefore, if you want to simulate a sequence of 200 frames you need to set SetToSequence_To1D_LinesToSimulate = 200 to…
  • Johannes Trein

    Replied to the thread FPGA Image Rotation.
    Post
    Hi Mike

    if your camera runs at 2448 x 2048 * 20fps with 12 Bit packed format the bandwidth will be 150MByte/s which is more than the theoretical maximum of Gigabit Ethernet vision.
    Anyway I made two designs which fulfill your requirements.

    You can…
  • Johannes Trein

    Post
    Hi Jayasuriya

    (Quote from JSuriya)

    It will work correct in hardware. In the simulation the 1D protocoll is considered as 2D images. Therefore, if you want to simulate a sequence of 200 frames you need to set SetToSequence_To1D_LinesToSimulate = 200 to…
  • JSuriya

    Post
    Hi Johannes,

    Yes the applet that you have provided is working well!. Lets consider a scenario like, " if i generate 200 images and it has a pixel with value 1 at the 100th row of it, then in simulation it will be separated as two images each of height…
  • Hi Jayasuriya
    the attached VA design should solve your task.
    It generates a random pattern representing your input images. Next all small images are appended to a single image of infinite height i.e. 1D image. Now we can check if one of the pixel in the…
  • Mike Faulkner

    Replied to the thread FPGA Image Rotation.
    Post
    Thanks for your quick response Johannes, I should have been more specific.
    Board will be microEnable4 - VQ4-GPoE
    Camera is 2448 x 2048 @20fps with a 2 by 2 Decimation down to 1224 x 1024
    The rotation is 90degrees with an unpacked 12bit output
    Is the…
  • Hi Jayasuriya
    the attached VA design should solve your task.
    It generates a random pattern representing your input images. Next all small images are appended to a single image of infinite height i.e. 1D image. Now we can check if one of the pixel in the…
  • Johannes Trein

    Post
    Hi Jayasuriya
    the attached VA design should solve your task.
    It generates a random pattern representing your input images. Next all small images are appended to a single image of infinite height i.e. 1D image. Now we can check if one of the pixel in the…
  • Johannes Trein

    Replied to the thread FPGA Image Rotation.
    Post
    Hi Mike,

    image rotation is a task for an FPGA which cannot be solved by the one algorithm. Factors are bandwidth, FPGA and board generation as well as specifications for the rotation.
    To you need a fixed rotation by 90, 180, 270°? Or a variable…
  • Johannes Trein

    Post
    Hi Jesse,
    This seems to be a program issue. I like to ask you to write your question directly to the Silicon Software support team support@silicon-software.de

    We will update this post after the support case is closed.

    BR
    Johannes
  • Mike Faulkner

    Posted the thread FPGA Image Rotation.
    Thread
    Hi Forum,

    How do you perform a real-time image rotation in VA ?

    Thank you
    Mike