Posts by graeffo

Dear Daniel,

I just saw your post. Does the problem still exist?

In your screenshot from microDisplay, I see that you are using the Optronis Cyclone 1HS 3500 camera. This delivers a maximum of 3.518 fps at full resolution.

In both designs you reduce the parallelism to 4. With the given image format (1.280x860) you can process a maximum of 1.100 fps.

So the question is, at what frame rate is the camera running in your application? Please test it with less than 1.100fps. If the design works with that, the problem is the parallelism. To use the full bandwidth of the camera, you need to increase the parallelism.

Best regards,

Oliver

Hi Jesse,

if you just want to insert the previous image above the current image, I would go for a more simple approach. Just double the input image in front of the InsertIamge and remove the first image in the second path. A buffer is needed in the first path while waiting for the insertion of path two.

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But I'm not sure if this is the answer to your question, since you have some modulo counts with divisor 15 or 16 in your design that I don't understand. So, if my approach doesn't fit your task, please give me some feedback with more details.

Best regards,

Oliver

Dear Kevin,

the operator ImageBufferMultiRoI requires a RAM module. See a part of the operator documentation below

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The VCLx grabber, like most others, provides four RAM modules. So, it is not possible to use more than four operators that require a RAM module in your design.

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Maybe there is a way to reduce the required number of RAM modules by combining images prior to the ImageBufferMultiROI. Could you give some more information about the input images, data rates (bit width and parallelism) and the ROIs you want to crop?

Best regards,

Oliver

Dear Kevin,

in my opinion your solution is the best and easiest way to use FLOAT values in calculations within VA. At least this is the way I have been using for many years now

As you did in your example, it is always recommended to work with bitshifts instead of multiplying the values by a power of ten for example. So, after calculation you can get rid of the fractional bits by a simple bitshift and you don't need to use the division operator, that can be very expensive regarding FPGA resources.

Greetings,

Oliver

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