Split image even and odd lines into two images issue

  • Hi Jesse,


    The dead-lock was indirectly caused by the ParallelDN's that were used in the odd/even line links.

    In case the data was coming in faster than the link properties allowed, data was not able to wait in the small FIFO buffers.

    That caused the design to loose data, leading to shorter and/or empty lines or images.

    Due to this the synchronization in between of the odd/even lines could not work properly/efficient and caused the mentioned dead-lock.


    The design below addresses the same result, but with a slightly different approach.

    Directly after the camera an additional ParallelUP is used in front of the RAM module.

    The ParellelUP is not really required, but enables a higher throughput in case one of the DMAs would stop the data stream for a short period of time. The RAM is now moved to the front. The SYNC is not required anymore since the odd and even lines are send to two different DMAs. The small FIFOs can still be found directly in fornt of the DMA operators.

    These small fifo's will take care of small stop conditions arising from the PCIe interface (DMA) and smoothen the data flow.



    SplitImage_MOD.png

    Modified VA Design above can be found here: mE5_MA_VCX-QP_Single_SplitImage_FIX_B.Rudde.va


    A second idea is sketched below, where only a single DMA is used to transfer the odd and the even lines next to each other:


    SplitImage_MOD_InsertLine_B.Rudde.png


    Here you can find the VA Design using the InsertLine approach: mE5_MA_VCX-QP_Single_SplitImage_MOD_InsertLIne_B.Rudde.va


    In case a single DMA transfer is sufficient and the data is accpeted within a single line you can use the approach below too:


    Simple_MOD.png


    This simple version of the VA Design can be found here: mE5_MA_VCX-QP_Single_MOD_Simple_B.Rudde.va

  • Hi Jesse,


    Thank you for your feedback on this.


    You are right, there was a stupid error from my side in there.

    I forgot to modify the Infinite-Source Enable/Disable settings of the corresponding.

    Fixed in here and the older post above: mE5_MA_VCX-QP_Single_SplitImage_FIX_B.Rudde.va


    Nevertheless I would expect that that design would at least deliver some image data in microDisplay.

    Maybe the following setting is missing in your microDisplay configuration:

    B.Rudde_mDisplay_DMA_settings.png


    Setting the check box regarding Ignore Cam Clock Status to enabled/checked will help to start both DMAs while only a single camera is connected.


    Additionally theUse GenICam Parameters is disabled/unchecked, in order to avoid the camera settings being applied to the target memory buffer sizes.


    The above settings dialog is not affecting the runtime/SDK approach at all.