Hi Forum,
How do you perform a real-time image rotation in VA ?
Thank you
Mike
Hi Forum,
How do you perform a real-time image rotation in VA ?
Thank you
Mike
Hi Mike,
image rotation is a task for an FPGA which cannot be solved by the one algorithm. Factors are bandwidth, FPGA and board generation as well as specifications for the rotation.
To you need a fixed rotation by 90, 180, 270°? Or a variable roation by e.g. 15°? Should the rotation angle be dynamic or static?
We have different examples included in the VisualApplets example list. See the examples in http://www.siliconsoftware.de/…ric%20Transformation.html
These examples can be adapted for rotation only. Depending on the bandwidth requirements they work well with small rotation angles.
For 90° rotations the implementation will always depend on the image dimensions and bandwidth requirements.
I hope my post will give you some ideas for your further work on this.
BR
Johannes
Thanks for your quick response Johannes, I should have been more specific.
Board will be microEnable4 - VQ4-GPoE
Camera is 2448 x 2048 @20fps with a 2 by 2 Decimation down to 1224 x 1024
The rotation is 90degrees with an unpacked 12bit output
Is the VQ4-GPoE FPGA's capable of processing this decimated image as described ?
Hi Mike
if your camera runs at 2448 x 2048 * 20fps with 12 Bit packed format the bandwidth will be 150MByte/s which is more than the theoretical maximum of Gigabit Ethernet vision.
Anyway I made two designs which fulfill your requirements.
You can fully simulate the design and test the maximum bandwidth in hardware using the build in pattern generator. You will need a Silicon Software mE4-VQ4GE FPGA frame grabber together with VisualApplets for testing. The applet can be adapted to other frame grabbers but needs some modifications because of shared DDR3 memory compared to the DDR2 on the microEnable IV.
Note: DRAM gets slow when it comes to non-linear write or read access. That's why such a simple task of 90° rotation is difficult for both technologies FGPA frame grabbers but also standard PC systems. The "fast" implementation uses all four DRAMs to increase the bandwidth.
At this moment I have no access to frame grabber hardware so I could not measure the resulting bandwidth. Once I have access to the hardware I will do the measurement.
BR
Johannes
Hi Johannes,
Thank you for your explanation on the bandwidth and difficulties as well as the VA examples.
This will become a solid base to start building the solution.
Best regards,
Mike
Hi Mike,
today I could test the apple in frame grabber hardware on FPGA. The "rotate90_simple.va" runs sufficiently fast enough for your application.
See the following screenshot.
We get 1024x1224*47fps = 58MPixel/s which is already the theoretic maximum of parallelism 1. As you will need 20fps only the applet is much faster than your requirements.
Applet "rotate90_fast.va" can be used for faster inputs like non-downsampling or Camera Link inputs. I needed to increase the parallelism after the buffer to use the fast speed. So the "fast" file above is incomplete. I will update this file for others having the same request.
Johannes
Just to complete this thread:
I updated "rotate90_fast.va". This applet can now process 235 MPixel/s. So almost the theoretic maximum of parallelism 4 which is 250 MPixel/s. If 8 instead of 12 bits are used it can be increased to parallelism 8.
See the attachment.
Johannes