Is there any possibility to use more than 4 operators consisting of off-chip RAM resources?

  • Is there any possibility to use more than 4 operators consisting of off-chip RAM resources? (From the physical FPGA level, not just the VisualApplets design level)


    We want to merge the pictures collected by the four cameras into one process for processing, which requires 4 buffers. But our follow-up process needs additional buffers.


    Take VQ4 capture card as an example, each off-chip RAM has 128M, and we don't actually need that much storage space. Is it possible to divide a physical DDR into more, such as 8 virtual banks, to provide more RAM-based operator usage rights.

  • Dear Silverfly,


    The amount of FPGA external RAM ressouces is currently restricted to a maximum of 4.

    In case of symmetric configurations and synchronization in between of the cameras an approach with InsertLine and AppendLine with ImageFIFOs directly behind the cameras it may become possible to write all camera image stream data into a single RAM ressource. That is additionally a question of the required bandwidth, because a single buffer needs to handle all 4 camera-streams at the same time.

    Björn RuddeMicroSiSo.png
    Field Application Engineer